1.6T is the Future of Ethernet. Are You Ready?



Data center traffic continues to explode, and soon 400G (and even 800G) isn’t going to be fast enough to support the growth. 

1.6T is the future of data center networking. Make sure you’re ready with expert predictions, advice, and test solutions.
Join us as industry Ethernet experts discuss:
  • Market trends driving the need for 224 Gbps speeds.
  • Technical challenges with 1.6T Ethernet and test solutions.
  • Optical and electrical innovations needed to make 1.6T a reality.


Webpage: Your Pathway to 1.6T View/Download
Webpage: Your Pathway To 1.6T 224 Gbps View/Download
Application Note: Data Center Ethernet Technology and Evolution to 224 Gbps View/Download
Webpage: M8050A 120 GBd High-Performance BERT View/Download
Webpage: Infiniium UXR‑Series Oscilloscopes View/Download
M8040A BERT Hardware Promotion View/Download


  • Kirk Jensen
    Product Marketing Manager
    Kirk Jensen is the Product Marketing Manager for Keysight’s High Performance Digital products. He has been planning and marketing high tech solutions for over 25 years. His last 7 years have been focused on test and measurement where he has worked with global customers to enable a variety of wired and wireless technologies. He holds a BS in Electrical Engineering from the University of Colorado along with an MBA.
  • Joachim Peerlings
    Vice President and General Manager at Keysight Technologies
    Dr. Joachim Peerlings is Vice President & General Manager, Internet Infrastructure Solutions, Communications Solutions Group, Keysight Technologies.

    Prior to his current position, Joachim served in a variety of management roles including marketing within Keysight Technologies Test & Measurement business.

    He joined the company in 2000 as Product Manager for the Optical Network Test, served as Director of Sales Development and General Manager for the Broadband Deployment Business and was responsible for the strategic marketing of Agilent’s Digital Test Division.

    Joachim holds a PhD in electronics from the Darmstadt University of Technology and earned a degree in electrical engineering from Duisburg University of Technology. He holds several U.S. patents.
  • Cathy Ye Liu
    Cathy Ye Liu, a distinguished engineer, and director, currently heads up the Broadcom SerDes architecture and modeling group. Previously she worked as an R&D director and distinguished engineer in Avago/LSI which acquired Broadcom in 2016. Since 2002, she has been working on high-speed transceiver solutions. Previously she has developed read channel and mobile digital TV receiver solutions. Her technical interests are signal processing, FEC, and modeling in high-speed optical and electrical transceiver solutions. She has published many journals and conference papers and holds 20+ US patents. Cathy has demonstrated her leadership roles in industry-standard bodies and forums. Cathy currently serves as the president of the board director of Optical Internetworking Forum (OIF), a member of the board of advisors for the department of Electrical & Computer Engineering (ECE) of the University of California at Davis, a member of Signal Integrity Journal editorial advisory board, and the co-chair of the DesignCon technical track of high-speed signal processing, equalization, and coding. She received her B.S. degree in Electronic Engineering from Tsinghua University, China, and received her M.S. and Ph.D. degrees in Electrical Engineering from the University of Hawaii.
  • Dr. Ali Ghiasi
    Dr. Ghiasi is currently president of Ghiasi Quantum LLC, a Silicon Valley consulting firm specializing in higher-speed Ethernet products, data center networks, optical interconnects, and co-packaged optics, and high speed-signaling. Client lists include early startups to large Multi-national Corporations.

    From 2000 to 2013, Dr. Ghiasi was with Broadcom Corporation where he pioneered high-speed serial interconnect through the creation of XFP MSA, SFP+ MSA, Copper Direct Attach “DAC” cables; and help develop 6 generations of Ethernet products from 10 GbE to 100 GbE. From 1996 to 2000, Dr. Ghiasi was at Sun Microsystems where he helped with the development of both Fibre Channel storage array and the first HPC system based on parallel optical interconnect. Prior to 1996, Dr. Ghiasi held positions at 3M Corporation and IBM Corporation working on high-speed signaling and optical interconnects.

    Dr. Ghiasi is the holder of 49 granted U.S. patents, and has published over 20 scientific papers, and co-authored two books in fiber-optics technology. Dr. Ghiasi holds a Ph.D. in Electrical Engineering from the University of Minnesota, a Master of Science in Electrical Engineering from North Dakota State University, and a Bachelor of Science from North Dakota State University.
  • Ryan Caldwell
    Director of Electrical Validation & SOC Engineering
    Ryan Caldwell is currently Director of Electrical Validation & SOC Engineering at Intel Corporation, PSG Division, where he is involved in developing state-of-the-art high-speed IO and RF solutions for integrated semiconductor and systems/solutions programs.
    With over 30 years of experience in engineering and engineering management in the semiconductor and integrated products areas, his expertise bridges semiconductor engineering, systems engineering, board design, test, quality/reliability, and infrastructure development.  He enjoys the many challenges of delivering state-of-the-art products and solutions to the industry and Intel customers.
  • Dr. Tony Chan Carusone
    Chief Technology Officer
    Tony Chan Carusone became Chief Technology Officer at Alphawave IP in 2022. Since completing his Ph.D. in 2002, he has been a professor of electrical engineering at the University of Toronto and a consultant to the industry.

    Dr. Chan Carusone has co-authored eight award-winning papers on chip-to-chip and optical communication circuits, ADCs, and clock generation and is a Distinguished Lecturer for the IEEE Solid-State Circuits Society 2015-2017. He served on the Technical Program Committee of the International Solid-State Circuits Conference from 2015 to 2021 and is currently Editor-in-Chief of the IEEE Solid-State Circuits Letters. He co-authored the latest editions of the classic textbooks “Analog Integrated Circuit Design” along with D. Johns and K. Martin, and “Microelectronic Circuits” along with A. Sedra and K.C. Smith. He is a Fellow of the IEEE.
  • Supriyo Dey
    Vice President of Business Development
    Supriyo Dey is Eoptolink’s Vice President of Business Development. He joined Eoptolink in 2020. Previously Dey served as Vice President and General Manager of Datacenter Business Unit at Source Photonics. From 2010 to 2017 Dey held numerous leadership roles with NeoPhotonics including Sr. Director of PLM for Datacenter Business Unit. Prior to that Dey was with Mintera Corporation where he held a variety of roles in R&D, Product Marketing, and Business Development. Dey has Co-authored a book chapter, “Advances in Microstrip and Printed Antennas” and published numerous research papers in peer-reviewed journals and conferences.

    Supriyo Dey holds a Ph.D. in electrical engineering from the Cochin University of Science and Technology, India, and an M.B.A. from the Columbia Business School at Columbia University.

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Webinar: 1.6T is the Future of Ethernet. Are You Ready? by Keysight