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Track 3: Device Modeling

Tuesday, October 10, 2023 · 1:00 p.m. · Eastern Time (US & Canada)
About This Webinar

  • Learn how to design for the latest interconnect technologies (DDR5 and PCIe6) and investigate pathfinding for future technologies using an end-to-end simulation workflow for signal and power integrity.

  • See industry-leading capabilities to optimize signal and power performance, including multi-level modulations (PAM3/4), decision feedback equalization (DFE), and simulations for conducted EMI.


  • View other tracks

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  • PathWave RF System Design

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