Overcoming PAM4 Design & Test Challenges in PCIe6

Are you ready to embrace the future of data transfer? PCIe 6 is here and is a game-changer for data centers, AI/ML, and cloud computing. It delivers 64 GT/s data rate with PAM4 signaling, a significant leap from previous NRZ-based serial bus technologies. Nevertheless, designing for PCIe 6 is not easy. You must deal with strict tolerances, evolving standards, and new component models you don't have complete control over, such as the connector, host board, transmitter, or receiver. Join Keysight’s PCIe experts to be ahead of the curve by accelerating your PCIe 6 workflow! In this webinar, you will learn: 

  • PCIe 6 spec overview and common design pitfalls. 
  • Essential test requirements for physical layer testing of transmitters and receivers. 
  • How to use reference channels and models to streamline your PCIe Gen6 workflow 
  • Perform virtual compliance testing using simulation and measurement correlation.


Solution Brief: Overcoming PAM4 Design & Test Challenges in PCIe6 View/Download
Webinar: KEF 3: Quick Guide to Recalibrate Your Signal Integrity for PCI Express ® Applications View/Download
White Paper: The Fast Track to PCIe® 5.0 View/Download


  • Rick Eads
    Principal Program Manager for Serial Computer Bus Technologies, Keysight Technologies
    Rick Eads is a principal program manager at Keysight Technologies with expertise in technical/industrial marketing and development of test and measurement tools and electronic design automation software in the computer, semi-conductor, communications, and storage industries. Rick provides technical leadership in driving standards within industry organizations for PCI Express, CCIX, GenZ, OCP, NVM Express, CEI 4.0, IEEE 802.3, ExpressCard, DDR, SATA, and InfiniBand. Rick earned an MBA from the University of Colorado and holds a BSEE from Brigham Young University with an emphasis on digital design and computer architecture. Rick actively contributes to the development of the PCIe physical layer BASE, CEM, and Test specifications and has led electrical Gold Suite testing at PCI-SIG workshops worldwide since 2004. Rick currently serves on the PCISIG Board of Directors and is also serving as the co-chair of the Gen-Z Consortium’s Compliance and Interoperability Working Group.
  • Pegah Alavi
    Senior Application Engineer, Keysight Technologies
    Pegah Alavi is a Senior Applications Engineer at Keysight Technologies, where she focuses on Signal Integrity and High Speed Digital systems. Prior to joining Keysight, Pegah worked on behavioral and macro-modeling of analog and mixed signal circuits and components in her previous jobs.

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Webinar: Overcoming PAM4 Design & Test Challenges in PCIe6 by Keysight