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Perform Simulation-Based, Virtual Compliance Tests for DDR

About This Webinar

Due to ever increasing data rates there is less design margin given to memory design engineers. You will have to make sure that your implementation is compliant to specifications. In this webinar, we will walk through the compliance tests and design exploration with several memory standards.

Featured Presenters
Webinar hosting presenter
Product Owner for DDR and SerDes Simulation
HeeSoo LEE is the SerDes/DDR product owner in the EEsof EDA group of Keysight Technologies DES division, located Santa Rosa California, USA. He has held several different positions in Keysight Technologies, Agilent Technologies, and Hewlett-Packard including consulting business manager, technical marketing lead, and field applications engineer since 1989. Before, he worked for Daeryung Ind. Inc. as a RF/MW circuit design engineer. He has over 30 years of design and simulation experience in the area of RF, microwave, and high-speed digital designs. He graduated with a BSEE degree from the Hankuk Aviation University, South Korea.