Desktop banner Mobile banner

Keysight EDA Connect World Tour: Eindhoven

Wednesday, May 15 | 10:00 a.m. - 4:00 p.m.

Register

Location: Eindhoven

The massive adoption of AI/ML, 5G, and IoT devices keeps driving the demand for faster data rates and memory technologies. These higher speeds make design and validation harder. You must deal with strict tolerances, evolving standards, and new component models you don't have complete control over. During this seminar we will address some of the latest developments in our Keysight’s EDA software, that help you to make you more efficient when doing your high-speed digital design.

Agenda

9:30 Registration & Welcome Coffee
10:00 Welcome & Introduction
10:20 Analyzing Die-To-Die Interfaces In Multi-Die High-Speed Digital Designs
11:20 Break
11:40 Simulation-Driven Compliance Solutions For PCIe6 And USB4v2 Standards
12:40 Lunch & Networking
13:40 Transforming chaos into clarity with design data and IP management software
14:40 Break
15:00 SerDes and Memory Design in the Age of AI/ML, 5G, and IoT Devices
16:00 Closing

Presenters

  • Marios Karatzias
    Marios Karatzias has 11 years in the semiconductor industry, specializing on analog & digital ASIC flows. Having experience from both the EDA provider and consumer industries, Marios strives to solve customer problems and places software quality and customer satisfaction as top priorities. While presales & post-sales activities are his main focus, he never omits to create novel flows and knowledge content to scale the support of his favourite tools: SOS for Data Management and HUB for Engineering Lifecycle Management.
  • Simon Muff
    Application Engineer and Business Development Manager for High Speed Digital and Power Electronics at Keysight Technologies
    Simon’s recent activities include the application of electromagnetic, frequency, transient, and channel simulators to solve Signal Integrity (SI) and Power Integrity (PI) challenges. He works as an Application Engineer and Business Development Manager for High Speed Digital and Power Electronics for Keysight Engineering Design Automation tools since 2018.

    His past experience includes 7 years in SI,PI and EMC simulation in the EDA business, leading AE and support teams. Before he worked 2 years on SerDes physical layer design. His previous experience includes 15 years on Memory Module Design and electrical & thermomechanical Simulation of PCB applications, where he contributed to JEDEC for DDR2 and 3 standardizations, responsible for a WW team developing DDR based customized DDR solutions. Simon hold several patents in the field of memory system and bus design.
Keysight EDA Connect World Tour: Eindhoven